Many popular modulation formats used in the field of digital communications assume the availability of a linear amplifier in a transmitter to boost a communication signal to a level at which it may be successfully broadcast from an antenna, then propagate to and be demodulated by a remotely located receiver. Linearity refers to the ability of an amplifier to faithfully reproduce a signal presented to it without causing the output signal from the amplifier to be distorted in some way. To the extent that the amplifier is imperfectly linear, distortion and spectral regrowth result. If this distortion and spectral regrowth are excessive, then the transmitter may fail to successfully operate within a spectral mask imposed by regulations and/or within power specifications.
Unfortunately, real-world amplifiers tend to exhibit nonlinear performance to some degree, and the degree to which they are nonlinear tends to be proportional to the amplifiers' cost and power inefficiency. In other words, the more desirable amplifier components and architectures from a cost and power efficiency perspective tend to exhibit greater nonlinearity tendencies. Thus, modern transmitter designs have benefitted from linearization efforts, in which the transmitter includes signal processing steps and circuits that compensate for amplifier nonlinearity.
One form of linearization is called predistortion because the processing steps and circuits are primarily included upstream of the amplifier. A predistorter intentionally distorts a more-or-less ideally configured communication signal, and the intentional distortion is specifically configured to counteract the distortion that the downstream amplifier will introduce. When the predistorter is implemented using digital circuits, costs may be held low and the signal processing of the predistorter may be somewhat insulated from noise, when compared to linearization efforts that rely extensively on analog signal processing.
FIG. 1 shows a simplified block diagram of a conventional approach to implementing predistortion in an RF transmitter 20. A nonlinear predistorter 22 resides upstream of an RF amplifier 24. A communication signal 26, preferably in digital form, is presented to nonlinear predistorter 22 where it is distorted and transformed into a predistorted communication signal 28. Predistorted communication signal 28 receives further processing, such as being converted into an analog signal and upconverted to RF, and is then presented to amplifier 24. Amplifier 24 transforms signal 28 into an output RF communication signal 30, which represents an amplified but distorted version of predistorted communication signal 28. Desirably, amplifier 24 distorts predistorted communication signal 28 in a way that causes output RF communication signal 30 to closely resemble communication signal 26, not considering the processing that takes place between predistorter 22 and amplifier 24.
The conventional approach depicted in FIG. 1 uses communication signal 26 and feedback obtained from output RF communication signal 30 to model the actual behavior of amplifier 24 at a control block 32. Many forms of Volterra models have been used in characterizing the actual behavior of amplifier 24, with a currently popular form of this approach being called a generalized memory polynomial (GMP) model. The basic approach assumes that the amplifier 24 may be characterized by a complicated system of equations that includes numerous unknown memory-less terms 34, unknown memory polynomial terms 36, and perhaps unknown envelope memory polynomial terms 38, which all can add together to adequately characterize the actual performance of amplifier 24 when the unknown terms are discovered.
Unfortunately, these numerous terms are not independent of one another but often appear to exhibit an extensive amount of cross correlation. And, memory polynomial terms are difficult to model because amplifier 24 tends to exhibit both long-term and short-term memory behaviors. Consequently, control block 32 is constrained to operate on extremely large blocks of samples from signals 26 and 30 and to calculate an extremely large number of terms in order to adequately characterize the behavior of amplifier 24. Then, when the behavior has been characterized, a matrix inversing operation is performed to determine the inverse of the system of equations that characterize the behavior of amplifier 24. The inverse may be viewed as another system of complicated equations, and terms from the inverse system of equations are used in updating an inverse memory-less terms block 40 and an inverse memory terms block 42 within nonlinear predistorter 22. Block 40 is conventionally implemented using a look-up table (LUT), and block 42 is conventionally implemented using a complicated two-dimensional finite impulse response (FIR) filter structure.
This conventional approach, which operates on extremely large blocks of samples, resolves extremely complicated equations, then performs an inversing operation of the complicated equations, and derives updated LUT terms from the inverse equations is called a polynomial batch approach herein. Unfortunately, the polynomial batch approach is effective in only limited applications and is completely unsuitable for other applications. The effectiveness of the polynomial batch approach is limited due to the massive amount of computational resources needed to implement control block 22. In order to maintain this massive amount of computational resources at practical levels even for limited applications, the time needed to calculate updates for nonlinear predistorter 22 is undesirably long, often several seconds, leading to an extremely slow loop bandwidth and an inability of transmitter 20 to respond adequately to signal dynamics. And, the power requirements of the polynomial batch approach are so great that this approach is unsuitable for battery-powered devices, which cannot tolerate excessive power consumption that reduces battery charge time and/or forces the use of larger batteries. Moreover, even in the limited applications where the polynomial batch approach is effective, it achieves poorer performance than desired due at least in part to a dependence on signal statistics, temperature, power level, and other normal dynamic signal characteristics for a given block of samples being processed.
An alternate conventional technique from the polynomial batch approach is a form of a continuous process control loop. Whereas a batch process collects data over a period of time, then presents an entire block of data to a subsequent process for further processing as a unit, a continuous process operates on each element of data as it becomes available. Nothing requires a continuous process control loop to operate at a 100% duty cycle, but while the process is active the continuous process operates on each data element as it becomes available, and if the continuous process goes inactive for a period data are generally ignored or used for another purpose. The continuous process control loop approach is able to update a LUT included in the predistorter using far fewer computational resources than are demanded by the polynomial batch approach.
One class of continuous process control loop implementations for a predistorter LUT is called a mapping predistorter or a Nagata predistorter. With this class of conventional implementations, a LUT essentially maps a full complex representation of a communication signal into a full complex representation of a predistorted communication signal. A continuous process control loop is used to update the LUT memory elements. All computations and the LUT table may be performed and implemented exclusively using Cartesian (i.e., rectilinear) coordinate representations of the communication signals. Unfortunately, this mapping predistorter requires an excessive amount of memory. For example, when 10-bit words are used to represent real and imaginary parts of the communication signal, the LUT must include around 2 million memory elements. And, this mapping predistorter converges slowly, due at least in part to the large memory size involved. Due to the large memory requirements and slow convergence, this technique is unsuitable for many applications, including mass market, battery-powered devices where power consumption and cost are major design considerations.
Another class of continuous process control loop implementations for a predistorter LUT is called a gain-based predistorter, or a Cavers predistorter. With this class of conventional implementations, a LUT essentially maps a magnitude parameter of a communication signal into a complex gain factor, which is then used to scale the communication signal to produce a predistorted communication signal. The gain-based predistorter requires several orders of magnitude fewer memory elements than the mapping predistorter, and it converges more quickly. But the conventional implementations of the gain-based predistorter nevertheless require excessive computational capabilities for many applications, including applications related to mass market battery-powered devices. In the conventional implementations of the gain-based predistorter, Cartesian-to-polar (and vice-versa) conversions are required, or a secant method may be alternatively used, to update the LUT and to achieve convergence. The LUT itself may be represented using either polar or Cartesian coordinates, but the updating/convergence process is performed using polar coordinates.
Reliance on Cartesian-to-polar (and vice-versa) conversions is undesirable because these conversions demand excessive computational resources, a situation which is exacerbated because they are also performed to a high degree of resolution in order to maintain quantization error beneath an acceptable level when the control loop has a low loop bandwidth. The Cartesian-to-polar (and vice-versa) conversions may be omitted if a secant convergence method is used to update the LUT memory elements. But excessive computational resources are still required because the secant method relies upon division operations. The computational resources demanded by the conventional gain-based predistorter make these implementations unsuitable for use in mass market, battery-powered devices and other transmitters that use a low loop bandwidth in updating the LUT.
Accordingly, a need exists for a predistorter LUT that is updated in a continuous processing control loop using fewer computational resources than have been demanded by conventional polynomial, memory mapping, and gain-based predistorters.